CLFS for a AMD ELAN SC520 target

Matt Darcy lfs-list at projecthugo.co.uk
Tue Nov 8 02:14:07 PST 2005


Felix Brack wrote:
> Matt Darcy wrote:
> 
> MD> Jim Gifford wrote:
> 
> 
>>>The target sanity checks are the only thing that can help you, but you 
>>>do have everything setup if your host is a Athlon like you say you 
>>>would set
>>>
>>>export LFS_HOST="${MACHTYPE}"
>>>
>>>for your target
>>>
>>>export LFS_TARGET="i586-pc-linux-gnu"
>>>
>>>Then just do the sanity check which is on the bottom of the page.
>>>
>>>if [ "${LFS_HOST}" = "${LFS_TARGET}" ]; then \
>>> echo "Host and Target can't be the same." ; fi
>>>
>>>
> 
> MD> If I remember correctly on this, the elan arch needs to be set in the 
> MD> kernel for the target system as it uses a slightly different subsystem
> MD> (I could be wrong on this)
> 
> MD> I'd certainly check this before deciding to chroot (impossible if I'm 
> MD> right and your host isn't an elan based distro) or boot.
> 
> MD> Matt
> 
> 
> 
> You are right: the ELAN arch must be set in the kernel. This works and
> the kernel just boots fine. At the very end, the last job done by the
> kernel is loading init and this fails. I do not see why because there
> is no output but I am quite sure that init segfaults.
> 
> If I take an image of the new CLFS system and replace the kernel
> temporarily with one that executes on my _host_ (AMD Athlon) this is
> fine. Following is the boot log on the target starting from grub and
> ending with the kernel calling init:
> 
> =============================
>   Booting 'LFS-Base'
> 
> root (hd0,0)
>  Filesystem type is ext2fs, partition type 0x83
> kernel /boot/bzImage-2.6.12.6 root=/dev/hda1 console=ttyS1,115200
>    [Linux-bzImage, setup=0x1200, size=0x1099c2]
> boot
> Linux version 2.6.12.6 (root at raptor) (gcc version 4.0.2) #5 Mon Nov 7 11:52:32 CET 2005
> BIOS-provided physical RAM map:
>  BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
>  BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved)
>  BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
>  BIOS-e820: 0000000000100000 - 0000000001000000 (usable)
>  BIOS-e820: 00000000fff00000 - 0000000100000000 (reserved)
> 16MB LOWMEM available.
> DMI not present.
> Allocating PCI resources starting at 01000000 (gap: 01000000:fef00000)
> Built 1 zonelists
> Kernel command line: root=/dev/hda1 console=ttyS1,115200
> Initializing CPU#0
> PID hash table entries: 128 (order: 7, 2048 bytes)
> Using pit for high-res timesource
> Console: colour dummy device 80x25
> Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
> Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
> Memory: 13568k/16384k available (1381k kernel code, 2404k reserved, 621k data, 104k init, 0k highmem)
> Checking if this processor honours the WP bit even in supervisor mode... Ok.
> Mount-cache hash table entries: 512
> CPU: AMD 486 DX/4-WB stepping 04
> Checking 'hlt' instruction... OK.
> NET: Registered protocol family 16
> PCI: PCI BIOS revision 2.10 entry at 0xf9b89, last bus=1
> PCI: Using configuration type 1
> PCI: Probing PCI hardware
> PCI: Probing PCI hardware (bus 00)
> serio: i8042 AUX port at 0x60,0x64 irq 12
> serio: i8042 KBD port at 0x60,0x64 irq 1
> Serial: 8250/16550 driver $Revision: 1.90 $ 8 ports, IRQ sharing disabled
> ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
> ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A
> ttyS2 at I/O 0x3e8 (irq = 4) is a 16550A
> ttyS3 at I/O 0x2e8 (irq = 3) is a 16550A
> io scheduler noop registered
> io scheduler anticipatory registered
> io scheduler deadline registered
> io scheduler cfq registered
> Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
> ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
> hda: STI Flash 7.0.0, CFA DISK drive
> ide2: I/O resource 0x3EE-0x3EE not free.
> ide2: ports already in use, skipping probe
> ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
> hda: max request size: 128KiB
> hda: 501760 sectors (256 MB), CHS=980/16/32
> hda: cache flushes not supported
>  hda: hda1
> mice: PS/2 mouse device common for all mice
> NET: Registered protocol family 2
> IP: routing cache hash table of 512 buckets, 4Kbytes
> TCP established hash table entries: 1024 (order: 1, 8192 bytes)
> TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
> TCP: Hash tables configured (established 1024 bind 1024)
> NET: Registered protocol family 1
> NET: Registered protocol family 17
>  hda: hda1
>  hda: hda1
> VFS: Mounted root (ext2 filesystem) readonly.
> Freeing unused kernel memory: 104k freed
> =======================================
> 
> At least the line "CPU: AMD 486 DX/4-WB stepping 04" looks very
> strange. This is why I am not sure anymore if my target triplet is
> correct.
> 
> Felix
> 
> 
> 
> 
Felix,

I've not got access to an ELAN box at this second, but I think I maybe 
able to get access to one tonight tommorow.

I'll run some tests with the target triplets and see how they respond 
and let you know.

I don't see why the Elan arch would work as a DX4/486.

Let me research on this as my experience on Elan is VERY small, but its 
a topic we need to be aware of for the cross-build process.

Matt.





More information about the cross-lfs mailing list